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GR712RC is a dual-core rad-hard LEON3FT System-on-Chip (SOC) offering a rich selection of IO interfaces for use in space.  

GR712RC has been developed in collaboration with, and is marketed exclusively by, Cobham Gaisler.


GR712RC die layout 


GR712RC in CQFP240 

Die Layout


CQFP 240-pin package

GR712RC dual-core processor SOC



JPIC is a rad-hard JPEG2000 image compression ASIC for use in observation satellites and in other space applications. It combines  5 Mbit SRAM and 300 Kgates and operates at 88MHz and 1Gbps.   JPIC brochure is available here.



Die Layout


Die and PQFP208 package

JPEG2000 Image Compression ASIC


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